The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.
In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling-down also requires ultra low-k materials to realize the scaled-down features. To achieve suitable ultra low-k materials, large quantities of porosity have been introduced into dielectric materials. However, the addition of porosity has resulted in deteriorating the mechanical properties of these materials (e.g., hardness, rigidity, etc.), leaving the materials unable to handle subsequent processing during semiconductor fabrication. For example, the weak mechanical strength of the porous low-k materials results in peeling after chemical mechanical planarization processes and delamination after packaging of the semiconductor devices.
Accordingly, what is needed is a semiconductor device that improves the mechanical strength of porous low-k materials.